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dsPIC30F Flash Programming Specification
DS70102K-page 52
2010 Microchip Technology Inc.
11.12 Reading Data Memory
The procedure for reading data memory is similar to
that of reading code memory, except that 16-bit data
words are read instead of 24-bit words. Since less data
is read in each operation, only working registers
W0:W3 are used as temporary holding registers for the
data to be read.
Table 11-12 shows the ICSP programming details for
reading data memory. Note that the TBLPAG register is
hard-coded to 0x7F (the upper byte address of all
locations of data memory).
TABLE 11-12: SERIAL INSTRUCTION EXECUTION FOR READING DATA MEMORY
Command
(Binary)
Data
(Hexadecimal)
Description
Step 1: Exit the Reset vector.
0000
040100
000000
GOTO 0x100
NOP
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
2007F0
880190
2xxxx6
MOV
#0x7F, W0
MOV
W0, TBLPAG
MOV
#<SourceAddress15:0>, W6
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
0000
EB0380
000000
BA1BB6
000000
BA1BB6
000000
BA1BB6
000000
BA1BB6
000000
CLR
W7
NOP
TBLRDL [W6++], [W7++]
NOP
TBLRDL [W6++], [W7++]
NOP
TBLRDL [W6++], [W7++]
NOP
TBLRDL [W6++], [W7++]
NOP
Step 4: Output W0:W5 using the VISI register and REGOUT command.
0000
0001
0000
0001
0000
0001
0000
0001
0000
883C20
000000
<VISI>
000000
883C21
000000
<VISI>
000000
883C22
000000
<VISI>
000000
883C23
000000
<VISI>
000000
MOV
W0, VISI
NOP
Clock out contents of VISI register
NOP
MOV
W1, VISI
NOP
Clock out contents of VISI register
NOP
MOV
W2, VISI
NOP
Clock out contents of VISI register
NOP
MOV
W3, VISI
NOP
Clock out contents of VISI register
NOP
Step 5: Reset device internal PC.
0000
040100
000000
GOTO 0x100
NOP
Step 6: Repeat steps 3-5 until all desired data memory is read.
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